BrainScaleS project
The BrainScaleS project aims to understand information processing in the brain at different scales ranging from individual neurons to whole functional brain areas. The research involves three approaches: in vivo biological experimentation, simulation on petascale supercomputers, and the construction of neuromorphic hardware. The goal is to extract generic theoretical principles of brain function and to use this knowledge to build artificial cognitive systems.
The neuromorphic hardware is based around wafer-scale analog VLSI. Each 20-cm-diameter silicon wafer contains 384 chips, each of which implements 128,000 synapses and up to 512 spiking neurons. This gives a total of ~49 million synapses and ~200,000 neurons per wafer. These VLSI models operate considerably faster than the biological originals, allowing the simulated neural networks to evolve thousands to hundreds-of-thousands quicker than real time.
The project is a European consortium of 13 research groups lead by a team at Heidelberg University, Germany. The project started on January 1, 2011 and has funding from the European Union through until 2014.
Neuromorphic hardware
The BrainScaleS hardware is based around wafer-scale integration of neuromorphic chips. The silicon wafers are 20 cm in diameter and contain an array of identical, tightly-connected chips. The circuitry is mixed-signal. That is, it contains a mix of both analog and digital circuits. The simulated neurons themselves are analog, while the synaptic weights and interchip communication is digital.
One wafer is built to contain 48 reticles. Each reticle contains 8 HICANN (High Input Count Analog Neural Network) chips. This makes a total of 384 identical chips per wafer.
An HICANN chip is 5x10 mm2 in size. Each one contains an ANC (Analog Neural Core), which is the central functional block, plus supporting circuitry. Each HICANN implements 128,000 synapses and 512 membrane circuits. These can be grouped together to form simulated neurons.
The number of neurons per chip depends on how many synapses are configured per neuron. For the maximum of 16,000 pre-synaptic inputs per neuron, 8 neurons are possible per chip. For the maximum of 512 neurons per chip, there can only be 256 synapses per neuron.
Thus, per wafer there is a total of 49,152,000 synapses, or up to 196,608 neurons. This is assuming that every chip on the wafer is flawless and functional, which will not necessarily always be the case.
The wafer is supported on an aluminum plate which also serves as a heat sink. A multi-layer printed circuit board (PCB) is placed on top of the wafer and this serves as the input/output interface to the neural circuitry. Larger systems can be built by interconnecting several wafer modules.
The circuitry implements time-continuous leaky integrate-and-fire neurons with conductance-based synapses. Neural networks can be created with both short-term and long-term plasticity mechanism. Because of the timescales involved in the chip operation, the neural networks can be evolved thousands of times faster than their real time biological counterparts. Altogether, the BrainScaleS architecture shows promise for studying Hebbian learning, STDP, and cortical dynamics.
The neuromorphic hardware was designed at the universities in Heidelberg and Dresden. The fabrication was done by UMC in Taiwan.
Supercomputer simulations
Coming soon...
In vivo experiments
Coming soon...
Funding
8.5 million euro funding, 1.Jan.2011 to 2014
BrainScaleS is an EU FET-Proactive FP7 funded research project.
BrainScaleS is funded with 9.2 million Euro
(8.5 million from the initial project, 0.7 million from the extension)
for 4 years in the Future Emerging Technologies (FET) programme
as part of EU Seventh Framework Programme (FP7)
Project Start: January 1st, 2011
Project Number 269921
Project extension by project number 287701 end 2011
http://cordis.europa.eu/fetch?RCN=97165
Total cost: 11.18 million euro
EU contribution: 8.5 million euro
Current status
Coming soon...
Timeline
25.Aug.2011 - neural net wafers arrived from UMC fab (BrainScaleS Tweet)
13.Sep.2011 - first wafer test, with wafer probe and needle card, good results (BrainScaleS Tweet)
14.Sep.2011 - first spikes seen (BrainScaleS Tweet)
23.Nov.2011 - first wafer maps available, to be used in network mapping algorithms (BrainScaleS Tweet)
Collaborators
Heidelberg University is leading the research project.
The neuromorphic hardware is being built in Heidelberg and Dresden.
The other universities involved are as follows:
- Heidelberg University, Germany - project lead, and hardware development
- Dresden Technical University, Germany - hardware development
- UNIC in Gif-sur-Yvette (near Paris), INCM and ISM (Marseille), France - practical and theoretical neuroscience
- Forschungszentrum Jülich, Germany - supercomputer center
- EPFL and the Blue Brain Project, Lausanne, Switzerland - neural network simulation
- NeuroMathComp team, INRIA research center, Sophia Antipolis, France - mathematics of neurocomputation
- NIN-KNAW, Amsterdam, The Netherlands - neuroscience research
- Computational Neuroscience at UMB, Ås (near Oslo), Norway - models and simulations, research by Gaute Einevoll
- KTH Stockholm, Sweden - large-scale model of the mammalian olfactory system, Bernhard Kaplan
- Computational Neuroscience at Pompeu Fabra University, Barcelona, Spain - lead by Gustavo Deco
- Cambridge University, UK - (details of collaboration unknown)
- Manchester University, UK - and the SpiNNaker brain simulation machine
- Debrecen University, Hungary - in vivo electrophysiology, Dr. Zoltan Kisvarday, Cortical Systems Neuroscience Lab
- Theoretical Computer Science, Technical University Graz, Austria - research projects, lead by Wolfgang Maass
- Brain Research Institute, Zürich University, Switzerland - in vivo research by Fritjof Helmchen
People involved
Project coordinator: Karlheinz Meier
| Alexander Kononov Heidelberg | Bernhard Kaplan   KTH Stockholm | Bernhard Vogginger  Heidelberg | ||
| Björn Kindler Heidelberg, project admin | Dan Husmann Heidelberg | Daniel Brüderle Heidelberg, postdoc researcher | ||
| Eric Müller Heidelberg | Holger Zoglauer Heidelberg | Johannes Schemmel  Heidelberg | ||
| Karlheinz Meier Heidelberg, project coordinator | Marc-Olivier Schwarz PhD candidate | Mihai Petrovici Heidelberg | ||
| Ranjeet Kuruvilla Heidelberg | Sebastian Jeltsch Heidelberg | Thomas Pfeil Heidelberg | ||
| Venelin Petkov Heidelberg |
Weblinks
- BrainScaleS project at Heidelberg University (homepage)
- Electronic Vision Group at Heidelberg University
- BrainScaleS project at Dresden University
- FACETS project at Heidelberg University (precursor to BrainScaleS)
- BrainScaleS Twitter feed
